Reconfigurable Switched-Capacitor ΔΣ Modulator Topology Design

In this paper, a methodology for designing reconfigurable discrete-time ∆Σ modulator topologies is proposed. Topologies are generated from a set of all possible topologies expressed by a generic topology, and optimized for minimizing the complexity of the topologies, maximizing the topology robustness with respect to circuit nonidealities, and minimizing total power consumption. The paper presents a case study for designing topologies for a three-mode reconfigurable ∆Σ modulator. The paper also offers a reconfigurable topology implementation on a Programmable System-on-Chip (PSoC) device.